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| UTC LAG665F LINEAR INTEGRATED CIRCUIT RADIO AND CASSETTE RECORDER CIRCUIT DESCRIPTION The UTC LAG665F is a monolithic integrated circuit, designed for portable radio cassette. FEATURES *1-Chip stereo tape recorder with motor speed controller. *Operating supply voltage range: Vcc=2~5V *Good volume control SOP-28 BLOCK DIAGRAM 27 26 25 24 23 22 21 19 20 18 14 17 16 15 13 Power Amp Pre Amp Attenuator Motor Control 1/2 Vcc Bias Control 1/2 Vcc V/I Power Amp Pre Amp Attenuator Power Amp 1 2 3 28 4 5 6 7 8 9 11 10 12 UTC UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R110-013,A UTC LAG665F PIN CONFIGURATION VBPRE 1IN+ 1ININFPRF IOUT PRE ATT1 CONVOL VREF 1OUT P GNDP VBP GNDMD VCON MOON LINEAR INTEGRATED CIRCUIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 GNDPRE 2IN+ 2IN2NFPRE 2OUT PRE ATT2 PREOFF VCCPRE VCC 2OUT P MOOFF VCCMO CONT CONS PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SYMBOL VBPRE 1 IN+ 1 IN 1 NFPRE 1 OUTPRE ATT 1 CONVOL VREF 1 OUTP GNDP VBP GNDMD VCON MOON DESCRIPTION Pre Amp Bias Voltage Channel 1 " +" Input Channel 1 " -" Input Feedback Attenuator 1 1 1 Pre Amp Output Volume Control Reference Voltage Power Amp Output Power GND Power Amp Bias Voltage Motor GND Motor Control Voltage Motor Forced Start 1 PIN NO. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 SYMBOL CONS CONT VCCMO MOOFF 2 OUTP VCC VCCPRE PREOFF ATT 2 2 OUTPRE 2 NFPRE 2 IN2 IN+ GNDPRE DESCRIPTION Speed Control Torqul Control Motor Power Control Motor Forced Stop Power Amp Output Supply Voltage Supply Voltage Pre Amp Off Attenuator Feedback 2 2 2 Pre Amp Output 2 Channel 2 " -" Input Channel 2 " +" Input Pre GND UTC UNISONIC TECHNOLOGIES CO., LTD. 2 QW-R110-013,A UTC LAG665F PARAMETER Supply Voltage Power Dissipation Operating Voltage Operating Temperature Storage Temperature LINEAR INTEGRATED CIRCUIT SYMBOL Vcc Pd Vop Topr Tstg ABSOLUTE MAXIMUM RATINGS(Ta=25C) VALUE -0.3~+7.5 450 2~5 -20~+65 -40~+125 UNIT V mW V C C ELECTRICAL CHARACTERISTICS(Ta=25C,Vcc=3V, f=1kHz, RL=16, unless otherwise specified) PARAMETER Supply Current PRE-AMPLIFIER Open Loop Gain Close Loop Gain Maximum Output Voltage Total Harmonic Distortion Output Noise Voltage Input Impedance Cross Talk between CH Pre Amp Output Voltage when Pre-Off Output Impedance when Pre-Off Input Impedance when Pre-Off Attenuator Maximum Input Voltage Maximum Attenuation Attenuation Error Input Impedance Control Ternimal Input Impedance Power Amplifier Voltage Gain Channel Voltage Difference Maximum Output Power I Maximum Output Power II Total Harmonic Distortion Cross Talk between CH Output Noise Voltage Ripple Rejection Pre + Pulse Boost + Power Noise Motor *Vcc=3V, Im=100mA Current Consumption Starting Current Reference Voltage SYMBOL Icc Gvo Gvc Vom THD Von Zin CT Vooff Rooff Rioff Vimax Vamax Vaerr Zia Zicot TEST CONDITIONS Vin=0V, IM=0mA Vo=-10dBm, RL= Vo=-10dBm THD=10% Vout=100mVrms Vin=0, Rg=2.2k, BPF(30~20k) Vout=-10dBm Rg=2.2k, Vout=-10dBm Vin=100mVrms MIN TYP 18 72 42 0.6 0.05 150 22 MAX 25 UNIT mA dB dB Vrms % Vrms k dB 40 0.45 44 0.5 300 18 30 -50 10 10 0.2 66 15 100 0 20 dB k K Vrms dB dB k k Vcont=Min Vcont=Max GV GV Pom 1 Pom 2 THD CT Von RR Vnto Pout=5mW Vcont=Max THD=10%, RL=32 THD=10%, RL=16 Pout=5mW Pout=5mW Rg=2.2k, Vcont=Min Vcc=3V, 100Hz, 100mVp-p Vin=0V, Rg=2.2k, Vcont=Max* 26 20 30 20 34 28 0 28 0.2 30 0.25 40 6 30 3 2 1 9 dB dB mW mW % dB mVrms dB mVrms IMC IMS Vref 3 Pin 15~Pin 16 500 0.72 0.8 5 0.87 mA mA V UTC UNISONIC TECHNOLOGIES CO., LTD. 3 QW-R110-013,A UTC LAG665F PARAMETER Reference Voltage Change I Reference Voltage Change II Reference Voltage Change III Current Factor Current Factor Change I Current Factor Change II Current Factor Change III Saturation Voltage at Forced ON Input Impedance at Forced ON Pin Leakage Current at Forced OFF Input Impedance at Forced OFF Pin LINEAR INTEGRATED CIRCUIT SYMBOL Vref 1 Vref 2 Vref 3 K K1 K2 K3 VCEsa Rion IML Ricon TEST CONDITIONS Vcc=2.1~5V Im=25~250mA Ta=-10~50C MIN TYP 0.05 0.01 0.01 38 0.5 0.05 0.02 5.6 MAX UNIT %/V %/mA %/C 32 Vcc=2.1~5V Im=25~250mA Ta=-10~50C IM=200mA, Pin 14=Vcc 43 %/V %/mA %/C V K A K 0.6 200 33 TEST CIRCUIT NOTE1 : SW12,SW12 R1,R' =33k R2,R2' =5.1k R3,R3' =200k R2,R2,=5.1k C1,C' =0.1F NOTE2 : See figure 1 for SW UTC UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R110-013,A UTC LAG665F FIGURE 1 Item Symbol 1 AMP Supply Current Close Loop Gain Maximum Output Voltage Total Harmonic Distortion Output Noise Voltage Cross Talk between CH LINEAR INTEGRATED CIRCUIT SW No. 2 3,3' 4 5 6 7 8 9 10 11 TEST CONDITION Vcc=3V,f=1kHz,RL=16 Icc c Gvc b Vom b THD b Von c CT b/ c c/ b b b a b a b b b a a Vin=100mV b b b a b b b a a Vo=244mV c b b b a b b b a a B.P.F.(30-20kHz) b b b b a b b b a a Vo=400mV b b b b a b b b a a Vo=244mV b b b b a b b b a a Im=0mA c a b b a b b b a a Output Voltage when PreOff Attenuator Maximum Input Voltage Maximum Attenuation Vooff b Vimax a Vamax a a a a b a b b b a a a a a b a b b b a a Vr=Min, THD=10%, Power AMP GV Voltage Gain Channel Voltage Difference Maximum Output Power I Maximum Output Power II GV a Pom 1 a Pom 2 a a a a b a b b b a a RL=16,THD=10% a a a b b a b b a a RL=32,THD=10% a a a b a b b b a a VR=MAX a a a a b a b b b a a Pout=5mV UTC UNISONIC TECHNOLOGIES CO., LTD. 5 QW-R110-013,A |
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